The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2024

Filed:

Dec. 22, 2022
Applicant:

Lenovo Enterprise Solutions (Singapore) Pte Ltd., Singapore, SG;

Inventors:

Gary D. Cudak, Raleigh, NC (US);

Mehul Shah, Austin, TX (US);

Pravin S. Patel, Cary, NC (US);

James Parsonese, Cary, NC (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/26 (2006.01); G06F 3/02 (2006.01); G06F 1/3203 (2019.01);
U.S. Cl.
CPC ...
G06F 1/26 (2013.01); G06F 3/02 (2013.01); G06F 1/3203 (2013.01);
Abstract

A system includes a partitionable multi-processor motherboard that has multiple central processing units, wherein the multi-processor motherboard may be configured to operate as a single unified node or configured to operate as multiple independent partitioned nodes. The system further comprises a single power button that is accessible to a user, wherein the single power button generates an output signal while being pressed, and an integrated circuit installed on the motherboard and connected to receive the output signal from the power button, wherein the integrated circuit stores a first button press gesture definition associated with selection of a first partitioned node, a second button press gesture definition associated with selection of a second partitioned node, and a third button press gesture definition associated with sequencing power to the selected one of the first or second partitioned nodes.


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