The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2024

Filed:

Oct. 28, 2021
Applicant:

Silicon Laboratories Inc., Austin, TX (US);

Inventor:

Eugenio Carey, Austin, TX (US);

Assignee:

Silicon Laboratories Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/317 (2006.01);
U.S. Cl.
CPC ...
G01R 31/31727 (2013.01); G01R 31/31703 (2013.01);
Abstract

In one embodiment, a method includes: powering on an integrated circuit (IC) and causing the IC to enter into a reset mode, where in the reset mode, a switch coupled between an oscillator of the IC and a reset pin is open; releasing the reset pin to cause the IC to enter into a non-reset mode, where in the non-reset mode the switch is closed to cause the clock signal to be superimposed on a reset signal at the reset pin; and determining, via a monitoring circuit coupled to the IC, the IC as functional in response to identifying the clock signal superimposed on the reset signal at the reset pin.


Find Patent Forward Citations

Quick Actions:

Carey, Eugenio. (2024). System, apparatus and method for identifying functionality of integrated circuit via clock signal superpositioning (U.S. Patent No. 11982710). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11982710

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…