The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 07, 2024
Filed:
Sep. 24, 2022
Applicant:
Apple Inc., Cupertino, CA (US);
Inventors:
Assignee:
Apple Inc., Cupertino, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04W 28/02 (2009.01); H04B 17/318 (2015.01); H04J 3/16 (2006.01); H04J 11/00 (2006.01); H04L 1/1812 (2023.01); H04L 1/1829 (2023.01); H04L 1/1867 (2023.01); H04L 5/00 (2006.01); H04L 5/14 (2006.01); H04L 41/069 (2022.01); H04L 41/50 (2022.01); H04L 43/16 (2022.01); H04L 65/60 (2022.01); H04L 65/75 (2022.01); H04L 67/10 (2022.01); H04W 4/70 (2018.01); H04W 8/08 (2009.01); H04W 24/02 (2009.01); H04W 24/08 (2009.01); H04W 24/10 (2009.01); H04W 28/16 (2009.01); H04W 36/00 (2009.01); H04W 36/14 (2009.01); H04W 36/22 (2009.01); H04W 40/00 (2009.01); H04W 40/24 (2009.01); H04W 48/16 (2009.01); H04W 48/20 (2009.01); H04W 52/02 (2009.01); H04W 52/04 (2009.01); H04W 52/14 (2009.01); H04W 72/02 (2009.01); H04W 72/044 (2023.01); H04W 72/0453 (2023.01); H04W 72/20 (2023.01); H04W 72/21 (2023.01); H04W 72/23 (2023.01); H04W 72/52 (2023.01); H04W 72/541 (2023.01); H04W 74/00 (2009.01); H04W 76/12 (2018.01); H04W 76/15 (2018.01); H04W 76/16 (2018.01); H04W 76/23 (2018.01); H04W 76/27 (2018.01); H04W 76/28 (2018.01); H04W 76/30 (2018.01); H04W 88/02 (2009.01); H04W 72/30 (2023.01); H04W 80/10 (2009.01); H04W 84/04 (2009.01); H04W 84/12 (2009.01); H04W 88/06 (2009.01); H04W 88/08 (2009.01); H04W 88/12 (2009.01); H04W 88/14 (2009.01); H04W 88/16 (2009.01); H04W 88/18 (2009.01);
U.S. Cl.
CPC ...
H04W 28/0221 (2013.01); H04B 17/318 (2015.01); H04J 3/1694 (2013.01); H04J 11/00 (2013.01); H04J 11/0086 (2013.01); H04L 1/1812 (2013.01); H04L 1/1861 (2013.01); H04L 1/1864 (2013.01); H04L 1/1893 (2013.01); H04L 5/0035 (2013.01); H04L 5/0055 (2013.01); H04L 5/0057 (2013.01); H04L 5/0073 (2013.01); H04L 5/14 (2013.01); H04L 41/069 (2013.01); H04L 41/5032 (2013.01); H04L 43/16 (2013.01); H04L 65/60 (2013.01); H04L 65/762 (2022.05); H04L 67/10 (2013.01); H04W 4/70 (2018.02); H04W 8/08 (2013.01); H04W 24/02 (2013.01); H04W 24/08 (2013.01); H04W 24/10 (2013.01); H04W 28/0205 (2013.01); H04W 28/0215 (2013.01); H04W 28/0252 (2013.01); H04W 28/0268 (2013.01); H04W 28/16 (2013.01); H04W 36/0061 (2013.01); H04W 36/0066 (2013.01); H04W 36/0083 (2013.01); H04W 36/0085 (2018.08); H04W 36/0088 (2013.01); H04W 36/14 (2013.01); H04W 36/22 (2013.01); H04W 40/005 (2013.01); H04W 40/246 (2013.01); H04W 48/16 (2013.01); H04W 48/20 (2013.01); H04W 52/0209 (2013.01); H04W 52/0212 (2013.01); H04W 52/0235 (2013.01); H04W 52/04 (2013.01); H04W 52/14 (2013.01); H04W 72/02 (2013.01); H04W 72/044 (2013.01); H04W 72/0453 (2013.01); H04W 72/20 (2023.01); H04W 72/21 (2023.01); H04W 72/23 (2023.01); H04W 72/52 (2023.01); H04W 72/541 (2023.01); H04W 74/002 (2013.01); H04W 74/004 (2013.01); H04W 76/12 (2018.02); H04W 76/15 (2018.02); H04W 76/16 (2018.02); H04W 76/23 (2018.02); H04W 76/27 (2018.02); H04W 76/28 (2018.02); H04W 76/30 (2018.02); H04W 88/02 (2013.01); H04L 5/001 (2013.01); H04W 72/30 (2023.01); H04W 80/10 (2013.01); H04W 84/042 (2013.01); H04W 84/12 (2013.01); H04W 88/06 (2013.01); H04W 88/08 (2013.01); H04W 88/12 (2013.01); H04W 88/14 (2013.01); H04W 88/16 (2013.01); H04W 88/18 (2013.01); Y02D 30/70 (2020.08);
Abstract
Embodiments of a system and method for providing DRX enhancements in LTE systems are generally described herein. In some embodiments, a system control module is provided for controlling communications via a communications interface. A processor is coupled to the system control module and is arranged to implement an inactivity timer and an on-duration timer for determining an active time for monitoring subframes on the physical downlink control channel for control signals, the processor further monitoring subframes after the active time.