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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11978766 B1

PDFFull Text
Date of Patent:
May. 07, 2024

Filed:

Oct. 07, 2021

Three-dimensional capacitive structures and their manufacturing methods

Applicants:

Murata Manufacturing Co., Ltd., Nagaokakyo, JP;

Commissariat a L'energie Atomique ET Aux Energies Alternatives, Paris, FR;

Inventors:

Frédéric Voiron, Barraux, FR;

Julien El Sabahy, Grenoble, FR;

Hiroshi Nakagawa, Caen, FR;

Naoki Iwaji, Nagaokakyo, JP;

Guy Parat, Grenoble, FR;

Assignees:

MURATA MANUFACTURING CO., LTD., Nagaokakyo, JP;

COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, Paris, FR;

Attorney:

Arentfox Shiff LLP

Primary Examiner:

Herve-Louis Y Assouman

Int. Cl.
CPC ...
H01G 4/12 (2006.01); H01G 4/012 (2006.01); H01G 4/30 (2006.01); H01G 4/33 (2006.01); H01L 23/00 (2006.01); H01L 29/00 (2006.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H01L 28/92 (2013.01); H01G 4/012 (2013.01); H01G 4/306 (2013.01); H01G 4/33 (2013.01); H01L 28/88 (2013.01);
Abstract

Three-dimensional capacitive structures may be produced by forming a capacitive stack conformally over pores in a region of porous anodic oxide. The porous anodic oxide region is provided on a stack of electrically-conductive layers including an anodization-resistant layer and an interconnection layer. In the pores there is a position having restricted diameter quite close to the pore bottom. In a first percentage of the pores in the region of anodic oxide, a functional portion of the capacitive stack is formed so as to extend into the pores no further than the restricted-diameter position. Cracks that may be present in the anodization-resistant layer have reduced effect on the properties of the capacitive structure. Increased thickness of the anodization-resistant layer can be tolerated, enabling equivalent series resistance of the overall capacitive structure to be reduced.

Find Patent Forward Citations

Voiron, Frédéric. (2024). Three-dimensional capacitive structures and their manufacturing methods (U.S. Patent No. 11978766). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11978766

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