The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 07, 2024

Filed:

Dec. 09, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Ming He, San Jose, CA (US);

Harsono Simka, Saratoga, CA (US);

Anthony Dongick Lee, Hwasung Si, KR;

Seowoo Nam, Seoul, KR;

Sang Hoon Ahn, Sungnam, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 21/3105 (2006.01); H01L 21/311 (2006.01); H01L 23/532 (2006.01); H01L 23/535 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76895 (2013.01); H01L 21/31053 (2013.01); H01L 21/31111 (2013.01); H01L 21/31144 (2013.01); H01L 21/76805 (2013.01); H01L 21/76819 (2013.01); H01L 21/76829 (2013.01); H01L 23/53242 (2013.01); H01L 23/53257 (2013.01); H01L 23/535 (2013.01);
Abstract

Integrated circuit devices including a via and methods of forming the same are provided. The methods may include forming a conductive wire structure on a substrate. The conductive wire structure may include a first insulating layer and a conductive wire stack in the first insulating layer, and the conductive wire stack may include a conductive wire and a mask layer stacked on the substrate. The method may also include forming a recess in the first insulating layer by removing the mask layer, the recess exposing the conductive wire, forming an etch stop layer and then a second insulating layer on the first insulating layer and in the recess of the first insulating layer, and forming a conductive via extending through the second insulating layer and the etch stop layer and contacting the conductive wire.


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