The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 07, 2024

Filed:

Feb. 17, 2021
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Ramanathan Muthiah, Bengaluru, IN;

Rakesh Balakrishnan, Bengaluru, IN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/46 (2006.01); G06F 3/06 (2006.01); G06F 9/48 (2006.01); G06F 13/16 (2006.01);
U.S. Cl.
CPC ...
G06F 9/4881 (2013.01); G06F 3/0604 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G06F 13/1668 (2013.01);
Abstract

A non-volatile storage system includes a memory controller and multiple integrated memory assemblies separate from and in communication with the memory controller. The integrated memory assemblies each comprises a memory die and a control die. The control die is connected (e.g., bonded) to the memory die. The memory controller and the control die include separate compute resources (e.g., each includes a processor). The storage system is configured to receive a request to perform a compute task and assign that compute task to any one or more of the memory controller and the integrated memory assemblies based on anticipated amount of data to be transferred to or from non-volatile memory for the compute task, computational resource need of the compute task, and/or available bandwidth of the memory controller and the control dies.


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