The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 07, 2024
Filed:
Dec. 09, 2021
Ifm Electronic Gmbh, Essen, DE;
Pmdtechnologies Ag, Siegen, DE;
Peter Runtemund, Siegen, DE;
Carl Philip Heising, Wilnsdorf, DE;
IFM Electronic GmbH, Essen, DE;
PMDTechnologies AG, Siegen, DE;
Abstract
Described is a circuit for background light suppression (SBI,) for a light propagation time sensor () which operates according to a phase measuring principle and the light propagation time pixels of which have integration nodes or diodes (Ga, Gb, diode_a, diode_b) for the accumulation of charges, having an input stage (), an operational amplifier (OP) and an SBI current source (SQ), wherein the input phase () has bypass and common mode circuits (SBP, SVcm) via which signals of the integration nodes (Ga, Gb, diode_a, diode_b) are guided to the operational amplifier (OP) and via which the operational amplifier (OP) can be switched to a maximum detection or common mode operation, wherein the operational amplifier (OP) is designed such that based on the signals of the integration nodes (Ga, Gb, diode_a, diode_b) switched by the input stage () to the operational amplifier (OP), a gate voltage (gate_cs) is generated for the SBI current source (SQ), wherein the SBI current source (SQ) has a first current source (SQ) for the maximum detection operation and a second and third current source (SQ, SQ) for the common mode operation wherein the current sources (SQ, SQ, SQ) can be connected via switches (S) to integration nodes (Ga, Gb, diode_a, diode_b).