The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2024

Filed:

Mar. 12, 2021
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventors:

Jae Hyun Han, Icheon-si, KR;

Dong Ik Suh, Icheon-si, KR;

Jae Gil Lee, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H10B 12/315 (2023.02); H10B 12/0335 (2023.02); H10B 12/056 (2023.02); H10B 12/482 (2023.02);
Abstract

A semiconductor device includes a substrate, a bit line conductive layer disposed on the substrate and extending in a first lateral direction substantially parallel to a surface of the substrate, first and second channel structures disposed on the bit line conductive layer to be spaced apart from each other in the first lateral direction, first and second gate dielectric layers disposed on side surfaces of the first and second channel structures over the substrate, first and second gate line conductive layers disposed on the first and second gate dielectric layers, respectively, the first and second gate line conductive layers common to the first and second channel structures, respectively, and extending in a second lateral direction perpendicular to the first lateral direction and substantially parallel to the surface of the substrate, and first and second storage node electrode layers disposed over the first and second channel structures, respectively.


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