The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2024

Filed:

Apr. 13, 2021
Applicant:

Ciena Corporation, Hanover, MD (US);

Inventors:

Xiaojin Liu, Ottawa, CA;

Kelly Donald Fromm, Bayview, ID (US);

Daniel Lee, San Jose, CA (US);

Vahid M. Naraghi, San Jose, CA (US);

Assignee:

Ciena Corporation, Hanover, MD (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04J 3/06 (2006.01);
U.S. Cl.
CPC ...
H04J 3/0682 (2013.01); H04J 3/0617 (2013.01); H04J 3/0644 (2013.01); H04J 3/0667 (2013.01);
Abstract

Systems, circuits, and methods for synchronizing devices in the time-domain are provided. A method, according to one implementation, includes determining a round-trip number based on a width of one cycle of a timestamping clock signal. The round-trip number is equal to a plurality of times that a clock signal is to be transmitted in a loop from a timing-leader component to a timing-follower component and back to the timing-leader component. The method also includes utilizing the timestamping clock signal to detect a cumulative time delay that results when the clock signal is transmitted in the loop a number of times equal to the round-trip number. The cumulative time delay is configured to enable synchronization of the timing-follower component with the timing-leader component.


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