The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2024

Filed:

Aug. 28, 2019
Applicant:

Nippon Telegraph and Telephone Corporation, Tokyo, JP;

Inventors:

Kotaro Takeda, Musashino, JP;

Kiyofumi Kikuchi, Musashino, JP;

Yoshiho Maeda, Musashino, JP;

Tatsuro Hiraki, Musashino, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/107 (2006.01); H01L 31/0232 (2014.01); H01L 31/028 (2006.01); H01L 31/0352 (2006.01);
U.S. Cl.
CPC ...
H01L 31/1075 (2013.01); H01L 31/02327 (2013.01); H01L 31/028 (2013.01); H01L 31/035272 (2013.01);
Abstract

Provided is a photodetector which can be manufactured in a standard process of a mass-produced CMOS foundry. The photodetector includes a silicon (Si) substrate; a lower clad layer; a core layer including a waveguide layer configured to guide signal light, and including a first Si slab doped with first conductive impurity ions and a second Si slab doped with second conductive impurity ions; a germanium (Ge) layer configured to absorb light and including a Ge region doped with the first conductive impurity ions; an upper clad layer; and electrodes respectively connected to the first and second Si slabs and the Ge region. A region of the core layer sandwiched between the first Si slab and the second Si slab operates as an amplification layer.


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