The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2024

Filed:

Oct. 12, 2021
Applicant:

Purdue Research Foundation, West Lafayette, IN (US);

Inventor:

James A. Cooper, Santa Fe, NM (US);

Assignee:

Purdue Research Foundation, West Lafayette, IN (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/10 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/16 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01); H01L 29/739 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/1037 (2013.01); H01L 29/1095 (2013.01); H01L 29/1608 (2013.01); H01L 29/4916 (2013.01); H01L 29/66681 (2013.01); H01L 29/66795 (2013.01); H01L 29/7802 (2013.01); H01L 29/7803 (2013.01); H01L 29/7835 (2013.01); H01L 29/785 (2013.01); H01L 29/0696 (2013.01); H01L 29/0865 (2013.01); H01L 29/7395 (2013.01);
Abstract

A semiconductor device includes at least a first lateral MOSFET formed on a semiconductor substrate. The first lateral MOSFET has an interface defined by a plurality of trenches along which the current flow can be modulated by a perpendicular electric field. The portion of the interface lies on a plane substantially perpendicular to the plane of the substrate. The interface is configured such that at least a portion of the current flow along the portion of the interface that lies on a plane substantially perpendicular to the plane of the substrate is in a direction substantially parallel to the plane of the substrate.


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