The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2024

Filed:

Oct. 20, 2021
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Jaimal Mallory Williamson, McKinney, TX (US);

Jim C Lo, Allen, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49894 (2013.01); H01L 21/4857 (2013.01); H01L 23/3121 (2013.01); H01L 23/49816 (2013.01); H01L 23/49822 (2013.01); H01L 24/08 (2013.01); H01L 24/16 (2013.01); H01L 2224/08235 (2013.01); H01L 2224/16227 (2013.01);
Abstract

A multilayer package substrate includes a plurality of dielectric layers including a top dielectric layer on a top side and a bottom dielectric layer on a bottom side. A top patterned metal layer is on the top dielectric layer and a bottom patterned metal layer is on the bottom dielectric layer. At least one of the top dielectric layer and the bottom dielectric layer is a porous dielectric layer having a plurality of pores including an average porosity of at least 5% averaged over its thickness.


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