The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 30, 2024
Filed:
Sep. 19, 2019
Applicant:
Tesla, Inc., Austin, TX (US);
Inventors:
Robert Yinan Cao, San Francisco, CA (US);
Mitchell Heschke, Los Altos Hills, CA (US);
Mengzhi Pang, Cupertino, CA (US);
Shishuang Sun, Cupertino, CA (US);
Vijaykumar Krithivasan, San Jose, CA (US);
Assignee:
Tesla, Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/40 (2006.01); H01L 23/498 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 23/4006 (2013.01); H01L 23/49822 (2013.01); H01L 23/49838 (2013.01); H01L 25/0652 (2013.01); H01L 25/50 (2013.01); H01L 2023/4081 (2013.01); H01L 2023/4087 (2013.01);
Abstract
Described is a multi-chip module that may include a Redistribution Layer (RDL) substrate having Integrated Circuit (IC) dies mounted to a first surface of the RDL substrate. A second plurality of IC dies may be mounted to an opposite second surface. A plurality of sockets can be mounted upon the second plurality of IC dies and a cold plate then mounted to the first plurality of IC dies. The mounting structure may include socket frames coupled to the plurality of sockets.