The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2024

Filed:

Dec. 18, 2020
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

Zhen Chen, Yokkaichi, JP;

Yanli Zhang, San Jose, CA (US);

Assignee:

SANDISK TECHNOLOGIES LLC, Addison, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 41/27 (2023.01); G11C 8/14 (2006.01); H10B 41/10 (2023.01); H10B 43/10 (2023.01); H10B 43/27 (2023.01);
U.S. Cl.
CPC ...
H10B 41/27 (2023.02); G11C 8/14 (2013.01); H10B 41/10 (2023.02); H10B 43/10 (2023.02); H10B 43/27 (2023.02);
Abstract

A three-dimensional memory device includes an alternating stack of insulating layers and word-line-level electrically conductive layers located over a substrate, and a vertical layer stack located over the alternating stack, the vertical layer stack including an insulating cap layer, drain select electrodes, and a drain-select-level insulating layer. The drain select electrodes are laterally spaced apart from each other by drain-select-level isolation structures. Memory stack structures including a respective vertical semiconductor channel and a respective memory film vertically extend through the alternating stack and the vertical layer stack. Each of the vertical semiconductor channels includes a word-line-level semiconductor channel portion extending through the alternating stack, a connection channel portion contacting a top end of the word-line-level semiconductor channel, and a drain-select-level semiconductor channel portion vertically extending through the vertical layer stack.


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