The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2024

Filed:

Jan. 17, 2019
Applicant:

Viasat, Inc., Carlsbad, CA (US);

Inventors:

Shih Peng Sun, Chandler, AZ (US);

Kenneth V. Buer, Gilbert, AZ (US);

Michael R. Lyons, Gilbert, AZ (US);

Gary P. English, Chanlder, AZ (US);

Qiang R. Chen, Phoenix, AZ (US);

Ramanamurthy V. Darapu, Gilbert, AZ (US);

Douglas J. Mathews, Mesa, AZ (US);

Mark S. Berkheimer, Tempe, AZ (US);

Brandon C. Drake, Mesa, AZ (US);

Assignee:

Viasat, Inc., Carlsbad, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/213 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 23/495 (2006.01); H01L 23/498 (2006.01); H01L 23/66 (2006.01); H03F 1/56 (2006.01); H05K 1/18 (2006.01);
U.S. Cl.
CPC ...
H03F 3/213 (2013.01); H01L 21/4853 (2013.01); H01L 23/49503 (2013.01); H01L 23/4952 (2013.01); H01L 23/49562 (2013.01); H01L 23/49575 (2013.01); H01L 23/49861 (2013.01); H01L 23/66 (2013.01); H01L 24/48 (2013.01); H03F 1/56 (2013.01); H05K 1/181 (2013.01); H01L 2223/665 (2013.01); H01L 2223/6655 (2013.01); H01L 2224/48139 (2013.01); H03F 2200/451 (2013.01);
Abstract

A packaged semiconductor chip includes a semiconductor sub strate having formed thereon: radio-frequency (RF) input and output contact pads, DC contact pads, and first and second amplifier stages. An input of the first amplifier stage is coupled with the RF input contact pad. An input and an output of the second amplifier stage are respectively coupled to an output of the first amplifier stage and the RF output contact pad. The DC contact pads and the input of the first amplifier stages are connected via an input bias coupling path. The outputs of the amplifier stages are connected via an output bias coupling path. The chip further includes a lead frame having RF input and output pins electrically coupled to the RF input and output contact pads, and input bias pins electrically coupled to the DC contact pad.


Find Patent Forward Citations

Loading…