The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2024

Filed:

May. 22, 2020
Applicant:

Zhejiang University, Zhejiang, CN;

Inventors:

Tingna Shi, Zhejiang, CN;

Huan Yao, Zhejiang, CN;

Yan Yan, Zhejiang, CN;

Guozheng Zhang, Zhejiang, CN;

Zhiqiang Wang, Zhejiang, CN;

Changliang Xia, Zhejiang, CN;

Assignee:

ZHEJIANG UNIVERSITY, Zhejiang, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 7/483 (2007.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H02M 7/4835 (2021.05); H02M 1/007 (2021.05); H02M 7/483 (2013.01);
Abstract

The invention proposed a space vector pulse width modulation (SVPWM) method for any level cascaded H-bridge inverter. The multilevel space vector diagram is re-divided, and the coordinates of the nearest three vectors (NTVs) are directly obtained by judging the position of the reference vector. The duty cycles of the NTVs is calculated through additional vector which is equivalent to the reference vector. Then, the switching states are obtained by zero-sequence component and coordinate transformation, and the desired reference vector is synthesized for the SVPWM modulation. The invention realizes multilevel modulation in Cartesian coordinates without any iterative calculation, and the calculation is independent of the level number. Furthermore, the locating of the reference vector and the calculation of the duty cycles are simplified, and the calculation complexity is reduced.


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