The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2024

Filed:

Feb. 01, 2023
Applicant:

Kioxia Corporation, Minato-ku, JP;

Inventor:

Takashi Maeda, Yokohama, JP;

Assignee:

Kioxia Corporation, Minato-ku, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 16/08 (2006.01); G11C 16/10 (2006.01); G11C 16/14 (2006.01); G11C 16/16 (2006.01); G11C 16/26 (2006.01); H02J 50/12 (2016.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01); G11C 5/14 (2006.01); G11C 16/30 (2006.01);
U.S. Cl.
CPC ...
H02J 50/12 (2016.02); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01); G11C 16/14 (2013.01); G11C 16/16 (2013.01); G11C 16/26 (2013.01); H10B 43/27 (2023.02); H10B 43/35 (2023.02); G11C 5/145 (2013.01); G11C 16/30 (2013.01); H02J 2310/48 (2020.01);
Abstract

When selectively erasing one sub-block, a control circuit applies, in a first sub-block, a first voltage to bit lines and a source line, and applies a second voltage smaller than the first voltage to the word lines. Then, the control circuit applies a third voltage lower than the first voltage by a certain value to a drain-side select gate line and a source-side select gate line, thereby performing the erase operation in the first sub-block. The control circuit applies, in a second sub-block existing in an identical memory block to the selected sub-block, a fourth voltage substantially identical to the first voltage to the drain side select gate line and the source side select gate line, thereby not performing the erase operation in the second sub-block.


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