The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 23, 2024
Filed:
Apr. 07, 2023
Applicant:
Lunar Energy, Inc., Mountain View, CA (US);
Inventors:
Mark Holveck, Sunnyvale, CA (US);
Anthony Sagneri, Dayton, NV (US);
Assignee:
Lunar Energy, Inc., Mountain View, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 7/487 (2007.01); H02J 3/38 (2006.01); H02J 3/46 (2006.01); H02M 3/00 (2006.01); H02M 7/483 (2007.01); H02S 30/10 (2014.01);
U.S. Cl.
CPC ...
H02J 3/46 (2013.01); H02J 3/381 (2013.01); H02M 3/003 (2021.05); H02M 7/487 (2013.01); H02S 30/10 (2014.12); H02J 2300/24 (2020.01); H02M 7/483 (2013.01);
Abstract
A split DC (Direct Current) bus inverter architecture includes a positive DC bus, a negative DC bus, and a neutral node. It further includes a split phase output. A first output of a DC-DC converter is connected to the neutral node and a second output of the DC-DC converter is connected to one of the positive DC bus or the negative DC bus.