The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2024

Filed:

Sep. 03, 2021
Applicant:

Vanguard International Semiconductor Corporation, Hsinchu, TW;

Inventors:

Chih-Yen Chen, Hsinchu, TW;

Tuan-Wei Wang, New Taipei, TW;

Franky Juanda Lumbantoruan, Sumatera Utara, ID;

Chun-Yang Chen, New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 21/02 (2006.01); H01L 23/29 (2006.01); H01L 23/31 (2006.01); H01L 29/20 (2006.01); H01L 29/205 (2006.01); H01L 29/207 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7787 (2013.01); H01L 21/0254 (2013.01); H01L 21/02576 (2013.01); H01L 21/02579 (2013.01); H01L 23/291 (2013.01); H01L 23/3171 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/207 (2013.01); H01L 29/66462 (2013.01);
Abstract

A semiconductor structure includes a buffer layer, a channel layer, a barrier layer, a doped compound semiconductor layer, and a composition gradient layer. The buffer layer is disposed on a substrate, the channel layer is disposed on the buffer layer, the barrier layer is disposed on the channel layer, the doped compound semiconductor layer is disposed on the barrier layer, and the composition gradient layer is disposed between the barrier layer and the doped compound semiconductor layer. The barrier layer and the composition gradient layer include a same group III element and a same group V element, and the atomic percentage of the same group III element in the composition gradient layer is gradually increased in the direction from the barrier layer to the doped compound semiconductor layer. A high electron mobility transistor and a fabrication method thereof are also provided.


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