The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 23, 2024
Filed:
Oct. 22, 2019
Applicant:
Hitachi Energy Ltd, Zürich, CH;
Inventors:
Assignee:
Hitachi Energy Ltd, Zurich, CH;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01); H01L 29/10 (2006.01); H01L 29/16 (2006.01); H01L 29/66 (2006.01); H01L 29/739 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/1608 (2013.01); H01L 29/1054 (2013.01); H01L 29/66068 (2013.01); H01L 29/66333 (2013.01); H01L 29/7395 (2013.01); H01L 29/7802 (2013.01);
Abstract
Disclosed is a vertical silicon carbide power MOSFET with a 4H-SiC substrate of n+-type as drain and a 4H-Si C epilayer of n−-type, epitaxially grown on the 4H-SiC substrate acting as drift region and a source region of p++-type, a well region of p-type, a channel region of p-type and a contact region of n++-type implanted into the drift region and a metal gate insulated from the source and drift region by a gate-oxide. A high mobility layer with a vertical thickness in a range 0.1 nm to 50 nm exemplarily in the range of 0.5 nm to 10 nm is provided at the interface between the 4H-SiC epilayer and the gate-oxide.