The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2024

Filed:

Nov. 09, 2021
Applicant:

Mediatek Singapore Pte. Ltd., Singapore, SG;

Inventors:

Chetan Deshpande, San Jose, CA (US);

Sushil Kumar, San Jose, CA (US);

Gajanan Sahebrao Jedhe, San Jose, CA (US);

Ritesh Garg, San Jose, CA (US);

Gaurang Prabhakar Narvekar, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 15/04 (2006.01);
U.S. Cl.
CPC ...
G11C 15/04 (2013.01);
Abstract

A content addressable memory (CAM) device includes multiple CAM sub-banks Each CAM sub-bank includes an array of CAM cells arranged in rows and columns and partitioned into a first stage and a second stage along a column dimension. Each CAM sub-bank further includes first-stage match lines (MLs), first-stage search line (SL) pairs, second-stage MLs, and second-stage SL pairs. Each second-stage SL pair is coupled to a column of CAM cells in the second stage and is gated by an SL enable (SL_EN signal). Each CAM sub-bank further includes a circuit operative to receive all of the first-stage MLs as input and de-assert the SL_EN signal when none of the first-stage MLs indicate a match. De-assertion of the SL_EN signal blocks a second portion search key from being provided to the second-stage SL pairs.


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