The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 23, 2024
Filed:
Jul. 21, 2022
Applicant:
Numem Inc., Sunnyvale, CA (US);
Inventor:
Bindiganavale S. Nataraj, Cupertino, CA (US);
Assignee:
NUMEM INC., Sunnyvale, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/41 (2006.01); G06N 3/04 (2023.01); G06N 3/063 (2023.01); G11C 11/418 (2006.01); G11C 11/419 (2006.01); H03K 19/20 (2006.01); H03K 19/21 (2006.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01); G06N 3/04 (2013.01); G06N 3/063 (2013.01); G11C 11/418 (2013.01); H03K 19/20 (2013.01); H03K 19/21 (2013.01);
Abstract
A memory includes an array with rows and columns of memory cells. The rows include a first row and a second row. The memory also includes a plurality of logic gates in the array. Each logic gate of the plurality of logic gates includes a first input coupled to a respective memory cell in the first row, a second input coupled to a respective memory cell in the second row, and an output. The memory further includes a plurality of sense lines in the array. The output of each logic gate of the plurality of logic gates is coupled to a sense line of the plurality of sense lines.