The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2024

Filed:

Nov. 02, 2022
Applicant:

Microsoft Technology Licensing, Llc, Redmond, WA (US);

Inventors:

Stefan Thom, Mill Creek, WA (US);

Paul England, Bellevue, WA (US);

Robert Karl Spiger, Seattle, WA (US);

Brian Telfer, Seattle, WA (US);

Sangho Lee, Bellevue, WA (US);

Marcus Peinado, Bellevue, WA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/4401 (2018.01); G06F 3/06 (2006.01); G06F 13/40 (2006.01); G06F 21/57 (2013.01);
U.S. Cl.
CPC ...
G06F 9/4406 (2013.01); G06F 3/0604 (2013.01); G06F 3/0622 (2013.01); G06F 3/065 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G06F 13/4068 (2013.01); G06F 21/572 (2013.01); G06F 2221/033 (2013.01);
Abstract

A storage device for booting a host computing device includes a first storage memory region having a first storage memory controller, a second storage memory region having a second storage memory controller, and a resilient boot controller. The resilient boot controller is configured to store boot code in the first storage memory region, prevent write access by the host computing device through the first storage memory controller to the first storage memory region, detect a reset of the host computing device through the input/output interface, copy at least a portion of the boot code from the first storage memory region to the second storage memory region, responsive to detection of the reset of the host computing device, and enable read access of the copied boot code by the host computing device through the second storage memory controller of the second storage memory region, responsive to the copy operation.


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