The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 16, 2024

Filed:

Aug. 30, 2021
Applicant:

Suzhou Lekin Semiconductor Co., Ltd., Suzhou, CN;

Inventors:

Youn Joon Sung, Seoul, KR;

Min Sung Kim, Seoul, KR;

Eun Dk Lee, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 33/38 (2010.01); H01L 33/12 (2010.01); H01L 33/32 (2010.01);
U.S. Cl.
CPC ...
H01L 33/38 (2013.01); H01L 33/12 (2013.01); H01L 33/32 (2013.01); H01L 33/382 (2013.01); H01L 2933/0016 (2013.01);
Abstract

A semiconductor device including a semiconductor structure including a first semiconductor layer, a second semiconductor layer, and an active layer; a first electrode provided on a first surface of the first semiconductor layer; a second electrode provided on a first surface of the second semiconductor layer, the active layer being provided between the first surface of the first semiconductor layer and a second surface of the second semiconductor layer that is opposite to the first surface of the second semiconductor layer; a first insulation layer provided on the first surface of the first semiconductor layer, the first surface of the second semiconductor layer, and a side surface of the active layer; a first cover electrode provided on the first electrode; a second cover electrode provided on the second electrode, a second insulation layer provided on the first cover electrode, the second cover electrode, and the first insulation layer, wherein: the second insulation layer includes a first opening over the first cover electrode and a second opening over the second cover electrode, and a plan view of the semiconductor includes a light emitting region that includes a surface of the second cover electrode in the second opening of the second insulation layer, and a non-light emitting region that includes a surface of the first cover electrode in the second opening of the first insulation layer, and a first area of the non-light emitting region is smaller than a second area of the light emitting region.


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