The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 16, 2024

Filed:

Apr. 26, 2023
Applicant:

Allegro Microsystems, Llc, Manchester, NH (US);

Inventors:

Ravi Vig, Concord, NH (US);

William P. Taylor, Amherst, NH (US);

Paul A. David, Bow, NH (US);

P. Karl Scheller, Dover, NH (US);

Andreas P. Friedrich, Metz-Tessy, FR;

Assignee:

Allegro MicroSystems, LLC, Manchester, NH (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 33/06 (2006.01); G01D 5/14 (2006.01); G01R 15/20 (2006.01); G01R 33/00 (2006.01); H01L 29/82 (2006.01);
U.S. Cl.
CPC ...
H01L 29/82 (2013.01); G01D 5/147 (2013.01); G01R 33/0047 (2013.01); G01R 33/0052 (2013.01); G01R 33/06 (2013.01); G01R 15/207 (2013.01); H01L 2224/45147 (2013.01); H01L 2224/48247 (2013.01); H01L 2924/00011 (2013.01);
Abstract

An integrated circuit package and method of fabrication are described. The integrated circuit package includes a lead frame having a first surface and a second opposing surface and a semiconductor die having a first, active surface in which circuitry is disposed and a second opposing surface attached to the first surface of the lead frame. A magnet attached to the second surface of the lead frame has a non-contiguous central region and at least one channel extending laterally from the central region. An overmold material forms an enclosure surrounding the magnet, semiconductor die, and a portion of the lead frame.


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