The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 16, 2024
Filed:
Apr. 06, 2022
Applicant:
Western Digital Technologies, Inc., San Jose, CA (US);
Inventors:
Bhanushankar Doni Gurudath, Bangalore, IN;
Harish Gajula, Bangalore, IN;
Assignee:
Western Digital Technologies, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0655 (2013.01); G06F 3/0604 (2013.01); G06F 3/0679 (2013.01);
Abstract
Rather than use one long folding operation to fold data from single-level cell (SLC) blocks into a multi-level cell (MLC) block, a storage system uses a multi-stage folding operation. By breaking up the folding process into stages, SLC blocks involved in an earlier stage can be released prior to a subsequent stage being performed. This can increase performance of the storage system by releasing SLC source blocks sooner and reducing an SLC block budget requirement.