The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 16, 2024

Filed:

Apr. 24, 2023
Applicant:

Vmware Llc, Palo Alto, CA (US);

Inventors:

Sowgandh Sunil Gadi, San Jose, CA (US);

Rajesh Venkatasubramanian, San Jose, CA (US);

Venkata Subhash Reddy Peddamallu, Sunnyvale, CA (US);

Arunachalam Ramanathan, Palo Alto, CA (US);

Timothy P. Mann, Palo Alto, CA (US);

Frederick Joseph Jacobs, Palo Alto, CA (US);

Assignee:

VMware LLC, Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/07 (2006.01); G06F 9/455 (2018.01);
U.S. Cl.
CPC ...
G06F 11/0793 (2013.01); G06F 9/45558 (2013.01); G06F 11/0712 (2013.01); G06F 11/0727 (2013.01); G06F 11/0751 (2013.01); G06F 11/079 (2013.01); G06F 2009/4557 (2013.01); G06F 2009/45583 (2013.01);
Abstract

Techniques for migrating virtual machines (VMs) in the presence of uncorrectable memory errors are provided. According to one set of embodiments, a source host hypervisor of a source host system can determine, for each guest memory page of a VM to be migrated from the source host system to a destination host system, whether the guest memory page is impacted by an uncorrectable memory error in a byte-addressable memory of the source host system. If the source host hypervisor determines that the guest memory page is impacted, the source host hypervisor can transmit a data packet to a destination host hypervisor of the destination host system that includes error metadata identifying the guest memory page as being corrupted. Alternatively, if the source host hypervisor determines that the guest memory page is not impacted, the source host hypervisor can attempt to read the guest memory page from the byte-addressable memory in a memory exception-safe manner.


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