The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 16, 2024

Filed:

Feb. 21, 2022
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Jamie L. Langlinais, Los Gatos, CA (US);

Inder M. Sodhi, Palo Alto, CA (US);

Lior Zimet, Kerem Maharal, IL;

Keith Cox, Sunnyvale, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/3206 (2019.01); G06F 1/3228 (2019.01); G06F 1/324 (2019.01); G06F 1/3293 (2019.01); G06F 1/3296 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3206 (2013.01); G06F 1/3228 (2013.01); G06F 1/324 (2013.01); G06F 1/3293 (2013.01); G06F 1/3296 (2013.01);
Abstract

Various techniques and circuit implementations for power reduction management in integrated circuits are disclosed. Different sets of power delivery trigger circuits may be coupled to the integrated circuit by wiring or serial communication interfaces. Power reduction responses may be implemented at faster rates utilizing the wired power delivery trigger circuits while slower power reduction response can be implemented utilizing serially connected power delivery trigger circuits. The threshold for power reduction response by wired power delivery trigger circuits may also be closer to a functional failure point of the integrated circuit in order to provide fast response to avoid failure of the integrated circuit.


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