The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 16, 2024

Filed:

Oct. 05, 2023
Applicant:

Lumotive, Inc., Redmond, WA (US);

Inventors:

Gleb M. Akselrod, Kenmore, WA (US);

Erik Edward Josberger, Renton, WA (US);

Assignee:

Lumotive, Inc., Redmond, WA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G02F 1/015 (2006.01); G02F 1/01 (2006.01); G02F 1/03 (2006.01); G02F 1/035 (2006.01);
U.S. Cl.
CPC ...
G02F 1/0151 (2021.01); G02F 1/0113 (2021.01); G02F 1/0338 (2013.01); G02F 1/035 (2013.01); G02F 2203/15 (2013.01);
Abstract

A metasurface may include a substrate layer and a two-dimensional array of metallic optical pillars arranged in rows and columns. A tunable dielectric material with a tunable refractive index is positioned between row-adjacent optical resonators. A two-dimensional active-matrix driver includes integrated driver routing layer(s), capacitor layer(s), and/or transistor layer(s). The driver routing layers enable row and column addressing of the two-dimensional array of metallic pillars via a row conductor for each row of metallic pillars and a column conductor for each column of metallic pillars. A transistor layer includes transistor devices connected to and configured to be selectively driven by the row and column conductors. The capacitor layer includes a plurality of storage capacitors. Each metallic pillar is connected in parallel to one of the storage capacitors in the capacitor layer and one of the transistor devices in the transistor layer.


Find Patent Forward Citations

Loading…