The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2024

Filed:

Jun. 16, 2022
Applicant:

Nordic Semiconductor Asa, Trondheim, NO;

Inventors:

Erlend Strandvik, Trondheim, NO;

Harald Garvik, Trondheim, NO;

Assignee:

Nordic Semiconductor ASA, Trondheim, NO;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/06 (2006.01); H03M 1/00 (2006.01);
U.S. Cl.
CPC ...
H03M 1/0626 (2013.01); H03M 1/002 (2013.01);
Abstract

Analog to digital conversion circuitry has an input sampling buffer, which has an input sampling capacitor for sampling an analog signal. The conversion circuitry also has a successive-approximation-register analog to digital converter (SAR-ADC) which converts the sampled analog signal to a digital signal. The input sampling buffer has an amplifier and a gain-control capacitor, and has an amplification configuration and an error-feedback configuration. In the amplification configuration, the input sampling capacitor is coupled to the amplifier and gain-control capacitor, with the gain-control capacitor connected in feedback with the amplifier, for applying gain to the sampled analog signal. In the error-feedback configuration, the gain-control capacitor is decoupled from the input sampling capacitor and receives a residue voltage from the SAR-ADC, such that the level of the analog signal determined in the amplification configuration varies depending on the residue voltage received onto the gain-control capacitor in the error-feedback configuration.


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