The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 09, 2024
Filed:
Jun. 15, 2020
Applicant:
Arm Limited, Cambridge, GB;
Inventors:
Alejandro Rico Carro, Austin, TX (US);
Douglas Joseph, Leander, TX (US);
Saurabh Pijuskumar Sinha, Schertz, TX (US);
Assignee:
Arm Limited, Cambridge, GB;
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2016.01); G06F 12/06 (2006.01); G06F 12/0811 (2016.01); G06F 12/0895 (2016.01); G06F 12/0897 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0897 (2013.01); G06F 12/0646 (2013.01); G06F 12/0811 (2013.01); G06F 12/0895 (2013.01); G06F 2212/1012 (2013.01); G06F 2212/283 (2013.01);
Abstract
Various implementations described herein are directed to device. The device may include a first tier having a processor and a first cache memory that are coupled together via control logic to operate as a computing architecture. The device may include a second tier having a second cache memory that is coupled to the first cache memory. Also, the first tier and the second tier may be integrated together with the computing architecture to operate as a stackable cache memory architecture.