The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 09, 2024
Filed:
Oct. 28, 2021
Applicant:
Silicon Laboratories Inc., Austin, TX (US);
Inventor:
Eugenio Carey, Austin, TX (US);
Assignee:
Silicon Laboratories Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 5/135 (2006.01); G01R 31/28 (2006.01); G06F 1/10 (2006.01); G06F 9/445 (2018.01);
U.S. Cl.
CPC ...
G06F 1/10 (2013.01); G01R 31/2896 (2013.01); G06F 9/445 (2013.01); H03K 5/135 (2013.01);
Abstract
In one embodiment, an apparatus includes: an oscillator to output a clock signal on a first line; a switch coupled to the first line; and a voltage divider coupled to the switch. The switch may be controlled to output the clock signal through the voltage divider via the first line to a pin in a non-reset mode and prevent the clock signal from being provided to the pin in a reset mode.
Quick Actions:
Carey, Eugenio. (2024). System, apparatus and method for identifying functionality of integrated circuit via clock signal superpositioning (U.S. Patent No. 11953936). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11953936
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile