The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 02, 2024

Filed:

Jan. 28, 2022
Applicant:

Microchip Technology Incorporated, Chandler, AZ (US);

Inventors:

Santosh Bhandarkar, Chandler, AZ (US);

Alex Dumais, Boise, ID (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02J 50/10 (2016.01); H02M 1/08 (2006.01); H02M 3/158 (2006.01); H02J 50/12 (2016.01); H02J 50/80 (2016.01);
U.S. Cl.
CPC ...
H02M 3/1582 (2013.01); H02M 1/08 (2013.01); H02J 50/10 (2016.02); H02J 50/12 (2016.02); H02J 50/80 (2016.02);
Abstract

Apparatuses and methods related to a converter are disclosed. An apparatus includes a converter and a controller. The converter converts an input voltage potential to an output voltage potential. The input voltage potential and the output voltage potential include direct current (DC) voltage potentials. The controller generates pulse width modulation (PWM) signals responsive to a duty cycle control signal, controls the converter via the PWM signals in a buck mode when the duty cycle control signal is less than a predetermined maximum buck value, and controls the converter via the PWM signals in a cascaded buck-boost mode (CBB mode) when the duty cycle control signal is greater than the predetermined maximum buck value. A duty cycle of at least a portion of the PWM signals transitions linearly with the duty cycle control signal from the buck mode to the CBB mode.


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