The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 02, 2024

Filed:

May. 27, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Sunjae Kim, Seoul, KR;

Eunsil Kang, Suwon-si, KR;

Daehyun Kim, Suwon-si, KR;

Sunkyoung Seo, Cheonan-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 23/29 (2006.01); H01L 23/498 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3192 (2013.01); H01L 23/295 (2013.01); H01L 23/3128 (2013.01); H01L 23/3185 (2013.01); H01L 23/49827 (2013.01); H01L 24/16 (2013.01); H01L 24/17 (2013.01); H01L 24/73 (2013.01); H01L 24/94 (2013.01); H01L 24/97 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 21/561 (2013.01); H01L 24/02 (2013.01); H01L 24/05 (2013.01); H01L 24/13 (2013.01); H01L 2224/02331 (2013.01); H01L 2224/02372 (2013.01); H01L 2224/02381 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/06519 (2013.01); H01L 2224/13024 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16146 (2013.01); H01L 2224/16235 (2013.01); H01L 2224/17181 (2013.01); H01L 2224/17519 (2013.01); H01L 2224/2929 (2013.01); H01L 2224/29386 (2013.01); H01L 2224/29499 (2013.01); H01L 2224/73204 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06568 (2013.01); H01L 2225/06589 (2013.01); H01L 2924/181 (2013.01); H01L 2924/1815 (2013.01); H01L 2924/18161 (2013.01);
Abstract

A semiconductor package includes a first semiconductor chip on a wiring structure, a plurality of internal terminals between the wiring structure and the first semiconductor chip; a high thermal conductivity layer is between the wiring structure and the first semiconductor chip; and an encapsulator on the high thermal conductivity layer and contacting the second semiconductor chip. Sidewalls of at least the wiring structure and the encapsulator are substantially coplanar.


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