The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 02, 2024

Filed:

Mar. 31, 2020
Applicant:

Google Llc, Mountain View, CA (US);

Inventors:

Sang Young Youn, Cupertino, CA (US);

Sun-il Chang, San Jose, CA (US);

Wonjae Choi, San Jose, CA (US);

Sangmoo Choi, Palo Alto, CA (US);

Assignee:

GOOGLE LLC, Mountain View, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/34 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3406 (2013.01); G09G 2320/0252 (2013.01); G09G 2320/064 (2013.01); G09G 2340/0435 (2013.01);
Abstract

PWM-frame rate misalignment is mitigated through implementation of a discrete variable refresh rate (VRR) scheme. A target frame rate is limited to a frame rate selected from only those frame rates that facilitate alignment of each frame period to a specified edge of a PWM cycle of a brightness control signal of a display panel. This alignment results in each frame period at the selected frame rate starting at a same point in a corresponding PWM cycle and ending at a same point in a corresponding PWM cycle to help ensure a constant effective duty cycle across each successive frame period, which in turn mitigates perception of flicker that otherwise would arise. Further, the discrete VRR scheme can employ a compensation mode for compensating for the delay in rendering or otherwise obtaining a frame for display so as to maintain a consistent duty cycle in the brightness control signal.


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