The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 02, 2024

Filed:

May. 24, 2021
Applicants:

Chengdu Boe Optoelectronics Technology Co., Ltd., Sichuan, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Haigang Qing, Beijing, CN;

Yunsheng Xiao, Beijing, CN;

Quanyong Gu, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 19/28 (2006.01); G09G 3/3266 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3266 (2013.01); G11C 19/28 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0852 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/0294 (2013.01); G09G 2330/021 (2013.01);
Abstract

A shift register includes: an input circuit configured to transmit an input signal received at an input signal terminal to a first node under control of a first clock signal transmitted by a first clock signal terminal; an output circuit configured to transmit a second clock signal received at a second clock signal terminal to an output signal terminal under control of a voltage of the first node; a first control circuit configured to, according to one of the second clock signal and a first voltage signal transmitted by a first voltage signal terminal, control a voltage of a second node under control of the voltage of the first node and the second clock signal; and a holding circuit configured to transmit the first voltage signal to the output signal terminal under control of the voltage of the second node.


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