The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 02, 2024

Filed:

Mar. 02, 2021
Applicant:

Nxp B.v., Eindhoven, NL;

Inventors:

Andreas Bernardus Maria Jansman, Nuenen, NL;

Andreas Lentz, Buchholz, DE;

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/56 (2013.01); G06F 1/28 (2006.01); G06F 1/3296 (2019.01); G06F 21/81 (2013.01); H03K 3/03 (2006.01); H03K 3/037 (2006.01); H03K 21/02 (2006.01);
U.S. Cl.
CPC ...
G06F 21/567 (2013.01); G06F 1/28 (2013.01); G06F 1/3296 (2013.01); G06F 21/81 (2013.01); H03K 3/0315 (2013.01); H03K 3/037 (2013.01); H03K 21/02 (2013.01); G06F 2221/034 (2013.01);
Abstract

A voltage glitch detector includes a ring oscillator, a plurality of counters, a combined result circuit, and a result evaluation circuit. The ring oscillator includes a plurality of series-connected stages. An output of a last stage of the ring oscillator is coupled to an input of a first stage of the ring oscillator. Each counter of the plurality of counters has an input coupled to a node located between two stages of the plurality of series-connected stages. The combined result circuit is coupled to each of the plurality of counters. The combined result circuit combines the count values received from each counter of the plurality of counters to provide a combined result. The result evaluation circuit is coupled to compare the combined result with a reference value to determine when a voltage glitch is detected.


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