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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11942463 B1

PDFFull Text
Date of Patent:
Mar. 26, 2024

Filed:

Apr. 28, 2023

Semiconductor devices

Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hyun Mog Park, Seoul, KR;

Sang Youn Jo, Suwon-si, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Suwon-si, KR;

Attorney:

Muir Patent Law, PLLC

Primary Examiner:

Nathan W Ha

Int. Cl.
CPC ...
H01L 25/18 (2023.01); H01L 23/00 (2006.01); H01L 23/528 (2006.01); H01L 25/00 (2006.01); H10B 41/27 (2023.01); H10B 41/30 (2023.01); H10B 41/40 (2023.01); H10B 43/27 (2023.01); H10B 43/30 (2023.01); H10B 43/40 (2023.01);
U.S. Cl.
CPC ...
H01L 25/18 (2013.01); H01L 23/528 (2013.01); H01L 24/05 (2013.01); H01L 24/08 (2013.01); H01L 24/09 (2013.01); H01L 24/89 (2013.01); H01L 25/50 (2013.01); H10B 41/27 (2023.02); H10B 41/30 (2023.02); H10B 41/40 (2023.02); H10B 43/27 (2023.02); H10B 43/30 (2023.02); H10B 43/40 (2023.02); H01L 2224/0557 (2013.01); H01L 2224/08147 (2013.01); H01L 2224/0913 (2013.01); H01L 2224/80001 (2013.01);
Abstract

A semiconductor device includes a first substrate structure including a first substrate, gate electrodes stacked on the first substrate, and extended by different lengths to provide contact regions, cell contact plugs connected to the gate electrodes in the contact regions, and first bonding pads disposed on the cell contact plugs to be electrically connected to the cell contact plugs, respectively, and a second substrate structure, connected to the first substrate structure on the first substrate structure, and including a second substrate, circuit elements disposed on the second substrate, and a second bonding pad bonded to the first bonding pads, wherein, the contact regions include first regions having a first width and second regions, of which at least a portion overlaps the first bonding pads, and which have a second width greater than the first width, and the second width is greater than a width of the first bonding pad.

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