The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 26, 2024
Filed:
Feb. 20, 2020
Beijing Boe Optoelectronics Technology Co., Ltd., Beijing, CN;
Boe Technology Group Co., Ltd., Beijing, CN;
Xianglei Qin, Beijing, CN;
Jian Lin, Beijing, CN;
Yong Zhang, Beijing, CN;
Limin Zhang, Beijing, CN;
Zepeng Sun, Beijing, CN;
Zhichao Yang, Beijing, CN;
Liangzhen Tang, Beijing, CN;
Zhilong Duan, Beijing, CN;
Honggui Jin, Beijing, CN;
Yashuai An, Beijing, CN;
Lingfang Nie, Beijing, CN;
Jian Wang, Beijing, CN;
Li Tian, Beijing, CN;
Jing Pang, Beijing, CN;
Xuechao Song, Beijing, CN;
BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Beijing, CN;
BOE TECHNOLOGY GROUP CO., LTD., Beijing, CN;
Abstract
Disclosed are a display panel and a driving method therefor, and a display device. Two adjacent rows of sub-pixels are taken as a row group, and the row group is provided with a first sub row group and a second sub row group that are arranged in a column direction; a gate electrode of a first transistor in the first sub row group is electrically connected to a first gate line; a gate electrode of a second transistor in the second sub row group is electrically connected to a second gate line; two adjacent sub-pixels in the column direction share one third transistor, and a gate electrode of the third transistor in the row group is electrically connected to a third gate line; and the first transistor and the second transistor in one column of sub-pixels are electrically connected to a data line by means of the shared third transistor.