The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 26, 2024

Filed:

Dec. 31, 2021
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Ramanathan Muthiah, Bangalore, IN;

Vimal Kumar Jain, Bangalore, IL;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 3/06 (2006.01); G06F 11/07 (2006.01); G06F 11/10 (2006.01); G06F 11/14 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01); G06F 3/0619 (2013.01); G06F 3/064 (2013.01); G06F 3/0656 (2013.01); G06F 3/0679 (2013.01); G06F 11/0757 (2013.01); G06F 11/1489 (2013.01);
Abstract

Apparatuses, systems, and methods for low latency parity for a memory device include a controller configured to accumulate, in a memory buffer, combined parity data for a plurality of regions of memory of a memory device in response to write operations for the plurality of regions of memory. The controller is configured to perform a recovery operation for a region of memory in response to determining that a latency setting for the region satisfies a latency threshold. The controller is configured to service a read request for data from the region based on a recovery operation to satisfy the latency setting.


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