The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 2024

Filed:

Dec. 31, 2020
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventor:

Enis Tuncer, Dallas, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/62 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/24 (2006.01); H01L 23/31 (2006.01); H02H 7/00 (2006.01); H01L 23/29 (2006.01); H01L 23/495 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 23/62 (2013.01); H01L 21/56 (2013.01); H01L 23/24 (2013.01); H01L 23/3135 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H02H 7/008 (2013.01); H01L 23/293 (2013.01); H01L 23/296 (2013.01); H01L 23/49513 (2013.01); H01L 23/53295 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/48245 (2013.01); H01L 2224/73265 (2013.01);
Abstract

A semiconductor package and a method for forming a semiconductor package are disclosed. The semiconductor package includes a metallic pad and leads, a semiconductor die including a semiconductor substrate attached to the metallic pad, and a conductor including a sacrificial fuse element above the semiconductor substrate, the sacrificial fuse element being electrically coupled between one of the leads and at least one terminal of the semiconductor die, a shock-absorbing material over a profile of the sacrificial fuse element, and mold compound covering the semiconductor die, the conductor, and the shock-absorbing material, and partially covering the metallic pad and leads, with the metallic pad and the leads exposed on an outer surface of the semiconductor package. Either a glass transition temperature of the shock-absorbing material or a melting point of the shock-absorbing material is lower than a melting point of the conductor.


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