The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 19, 2024
Filed:
Feb. 08, 2022
Applicant:
Faraday Technology Corp., Hsin-Chu, TW;
Inventors:
Sridhar Cheruku, Karnataka, IN;
Sivaramakrishnan Subramanian, Karnataka, IN;
Hussainvali Shaik, Karnataka, IN;
Ko-Ching Chao, Hsin-Chu, TW;
Assignee:
Faraday Technology Corp., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/22 (2006.01); G11C 7/10 (2006.01); G11C 11/4076 (2006.01); G11C 11/4096 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4076 (2013.01); G11C 7/1093 (2013.01); G11C 7/222 (2013.01); G11C 11/4096 (2013.01); G11C 7/1087 (2013.01);
Abstract
The present invention provides a physical layer and associated signal processing method for clock domain transfer of quarter-rate data. In the embodiments of the present invention, the quarter-rate data is processed by many sampling circuits by using a first clock signal, a second clock signal and a third clock signal, and phases of these clock signals are aligned by using a training mechanism to that the clock signals have better timing margins.