The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 2024

Filed:

Sep. 07, 2021
Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventors:

Jonathon Evans, Santa Clara, CA (US);

Kaushal Agarwal, Karnataka, IN;

Assignee:

NVIDIA Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/79 (2013.01); G06F 12/1045 (2016.01); G06F 12/14 (2006.01); H04L 9/32 (2006.01);
U.S. Cl.
CPC ...
G06F 21/79 (2013.01); G06F 12/1054 (2013.01); G06F 12/1063 (2013.01); G06F 12/1408 (2013.01); H04L 9/3247 (2013.01); G06F 2212/1052 (2013.01); G06F 2212/657 (2013.01);
Abstract

A host may use address translation to convert virtual addresses to physical addresses for endpoints, which may then submit memory access requests for physical addresses. The host may incorporate the physical address and a signature of the physical address generated using a private key into a translated address field of a response to a translation request. An endpoint may treat the combination as a translated address by storing it in an entry of a translation cache, and accessing the entry for inclusion in a memory access request. The host may generate a signature of the translated address from the request using the private key, with the result being compared to the signature from the request. The memory access request may be verified when the compared values match, and the memory access may be performed using the translated address.


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