The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 2024

Filed:

Apr. 29, 2021
Applicant:

Dell Products L.p., Round Rock, TX (US);

Inventors:

Jacob Vick, Leander, TX (US);

Michael James Pescetto, Round Rock, TX (US);

Philip Joseph Grossmann, Austin, TX (US);

Travis C. North, Cedar Park, TX (US);

Assignee:

Dell Products L.P., Round Rock, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/30 (2006.01);
U.S. Cl.
CPC ...
G06F 11/3058 (2013.01); G06F 2209/5022 (2013.01);
Abstract

A processing system concurrency optimization system includes a processing system having first and second processing subsystems, a power system that is coupled to the first and second processing subsystems, a processing system concurrency optimization database, and a processing system concurrency optimization subsystem that is coupled to the power system and the processing system concurrency optimization database. The processing system concurrency optimization subsystem determines that a first workload has been provided for performance by the processing system, and identifies a first processing system concurrency optimization profile that is associated with the first workload in the processing system concurrency optimization database. Based on the first processing system concurrency optimization profile, the processing system concurrency optimization subsystem configures the power system to provide first power in a first power range to the first processing subsystem and second power in a second power range to the second processing subsystem.


Find Patent Forward Citations

Vick, Jacob. (2024). Subsystem power range configuration based on workload profile (U.S. Patent No. 11934286). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11934286

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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