The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 12, 2024

Filed:

Oct. 24, 2022
Applicant:

Marvell Israel (M.i.s.l) Ltd., Yokneam, IL;

Inventors:

Rami Zemach, Givat Shapira, IL;

Itay Peled, Hagor, IL;

Jacob Jul Schroder, Lyngby, DK;

Zvi Shmilovici Leib, Tel Aviv, IL;

Gideon Navon, Tel-Aviv, IL;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 47/122 (2022.01); H04L 47/33 (2022.01); H04L 47/52 (2022.01); H04L 47/722 (2022.01); H04L 49/90 (2022.01);
U.S. Cl.
CPC ...
H04L 47/122 (2013.01); H04L 47/33 (2013.01); H04L 47/521 (2013.01); H04L 47/722 (2013.01); H04L 49/9078 (2013.01);
Abstract

A packet processor of a network device receives packets ingressing from a plurality of network links via a plurality of network ports of the network device. The packet processor buffers the packets in an internal packet memory in a plurality of queues, including a first queue. In response to the packet processor detecting congestion in the internal packet memory, the packet processor selectively forwards a group of multiple packets in the first queue from the internal packet memory to a first port, among one or more ports coupled to one or more external memories, to transfer the group of multiple packets to a first external memory that is coupled to the first port so that the first queue is stored across the internal packet memory and the first external packet memory.


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