The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 12, 2024

Filed:

Mar. 09, 2021
Applicants:

Beijing Boe Optoelectronics Technology Co., Ltd., Beijing, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Zepeng Sun, Beijing, CN;

Yong Zhang, Beijing, CN;

Xianglei Qin, Beijing, CN;

Jian Wang, Beijing, CN;

Yanchen Li, Beijing, CN;

Jian Lin, Beijing, CN;

Limin Zhang, Beijing, CN;

Zhichao Yang, Beijing, CN;

Liangzhen Tang, Beijing, CN;

Zhilong Duan, Beijing, CN;

Yashuai An, Beijing, CN;

Lingfang Nie, Beijing, CN;

Honggui Jin, Beijing, CN;

Li Tian, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1333 (2006.01); G02F 1/133 (2006.01); G02F 1/1345 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); G09G 3/36 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
G02F 1/133388 (2021.01); G02F 1/13306 (2013.01); G02F 1/133354 (2021.01); G02F 1/13452 (2013.01); G02F 1/136286 (2013.01); G02F 1/1368 (2013.01); G09G 3/3677 (2013.01); H01L 27/124 (2013.01); H01L 27/1259 (2013.01); G09G 2300/0408 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/08 (2013.01); G09G 2320/043 (2013.01); G09G 2330/02 (2013.01);
Abstract

Provided is a display substrate. The display substrate includes: a base substrate including a display region and a non-display region surrounding the display region; a gate drive circuit disposed in the non-display region; a plurality of first signal lines disposed in the peripheral region and connected to the gate drive circuit; and a plurality of second signal lines disposed in the non-display region and connected to the gate drive circuit; wherein each of the first signal line and the second signal line is configured to supply a signal to the gate drive circuit, and a frequency of the signal supplied by the first signal line is lower than a frequency of the signal supplied by the second signal line.


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