The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2024

Filed:

Sep. 28, 2021
Applicant:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Inventors:

Prateek Mishra, Kanpur, IN;

Thanapandi G, Sivangangai, IN;

Jagadeesh Anathahalli Singrigowda, Bangalore, IN;

Dhruvin Devangbhai Shah, Bangalore, IN;

Girish Anathahalli Singrigowda, Bangalore, IN;

Animesh Jain, Bangalore, IN;

Assignee:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/037 (2006.01); H03K 17/081 (2006.01); H03K 19/00 (2006.01);
U.S. Cl.
CPC ...
H03K 3/037 (2013.01); H03K 17/08104 (2013.01); H03K 19/0002 (2013.01);
Abstract

A voltage level-shifting circuit for an integrated circuit includes an input terminal receiving a voltage signal referenced to an input/output (I/O) voltage level. A transistor overvoltage protection circuit includes a first p-type metal oxide semiconductor (PMOS) transistor includes a source coupled to the second voltage supply, a gate receiving an enable signal, and a drain connected to a central node. A first n-type metal oxide semiconductor (NMOS) transistor includes a drain connected to the central node, a gate connected to the input terminal, and a source connected to an output terminal. A second NMOS transistor includes a drain connected to the input terminal, a gate connected to the central node, and a source connected to the output terminal.


Find Patent Forward Citations

Loading…