The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2024

Filed:

Jun. 02, 2021
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Takashi Ando, Eastchester, NY (US);

Guy M. Cohen, Ossining, NY (US);

Nanbo Gong, White Plains, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7855 (2013.01); H01L 29/6684 (2013.01); H01L 29/66484 (2013.01); H01L 29/66795 (2013.01); H01L 29/78391 (2014.09);
Abstract

An approach for representing both positive and negative weights in neuromorphic computing is disclosed. The approach leverages a double gate FeFET (ferroelectric field effect transistor) device. The device leverages a double-gate FeFET with four terminals (two separate gates and source and drain) and ferroelectric gate dielectric. The device may have a junction-less channel. A synaptic weight is programmed by biasing one of the two gates. The store weight is sensed via a current flow from source to drain. A pre-defined bias is applied to the other gate during the sensing, such that a reference current is subtracted from the drain current. The net current for sensing is current from the synaptic devices subtracted by the pre-defined reference current.


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