The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2024

Filed:

Jan. 10, 2022
Applicant:

Infineon Technologies Austria Ag, Villach, AT;

Inventors:

Hyeongnam Kim, Chandler, AZ (US);

Jens Ulrich Heinle, Villach, AT;

Mohamed Imam, Chandler, AZ (US);

Bhargav Pandya, Chandler, AZ (US);

Ramakrishna Tadikonda, Torrance, CA (US);

Manuel Vorwerk, Villach, AT;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/06 (2006.01); H01L 21/8252 (2006.01); H01L 27/085 (2006.01); H01L 27/088 (2006.01); H01L 29/66 (2006.01); H01L 29/778 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7786 (2013.01); H01L 21/8252 (2013.01); H01L 27/0605 (2013.01); H01L 27/085 (2013.01); H01L 27/088 (2013.01); H01L 29/66462 (2013.01); H01L 29/7787 (2013.01);
Abstract

A semiconductor device includes type IV semiconductor base substrate, first and second device areas that are electrically isolated from one another, a first region of type III-V semiconductor material formed over the first device area, a second region of type III-V semiconductor material formed over the second device area, the second region of type III-V semiconductor material being laterally electrically insulated from the first region of type III-V semiconductor material, a first high-electron mobility transistor integrally formed in the first region, and a second high-electron mobility transistor integrally formed in the second region. The first and second high-electron mobility transistors are connected in series. A source terminal of the first high-electron mobility transistor is electrically connected to the first device area. The first device area is electrically isolated from a subjacent intrinsically doped region of the base substrate by a first two-way voltage blocking device.


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