The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2024

Filed:

Feb. 25, 2019
Applicant:

The George Washington University, Washington, DC (US);

Inventors:

Jiaxin Peng, North Bethesda, MD (US);

Tarek El-Ghazawi, Vienna, VA (US);

Volker J. Sorger, Alexandria, VA (US);

Shuai Sun, Arlington, VA (US);

Assignee:

The George Washington University, Washington, DC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/72 (2006.01); G02B 6/122 (2006.01); G02B 6/35 (2006.01); G02F 1/313 (2006.01); G06E 3/00 (2006.01); G06E 1/06 (2006.01); G02F 1/31 (2006.01);
U.S. Cl.
CPC ...
G06F 7/729 (2013.01); G02B 6/122 (2013.01); G02B 6/3596 (2013.01); G02F 1/311 (2021.01); G02F 1/3132 (2013.01); G06E 1/065 (2013.01); G06E 3/001 (2013.01); G06F 7/727 (2013.01);
Abstract

An integrated photonics computing system implements a residue number system (RNS) to achieve orders of magnitude improvements in computational speed per watt over the current state-of-the-art. RNS and nanophotonics have a natural affinity where most operations can be achieved as spatial routing using electrically controlled directional coupler switches, thereby giving rise to an innovative processing-in-network (PIN) paradigm. The system provides a path for attojoule-per-bit efficient and fast electro-optic switching devices, and uses them to develop optical compute engines based on residue arithmetic leading to multi-purpose nanophotonic computing.


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